9LS138

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1-of-8 Decoder/Demultiplexer, 4.75V to 5.25V Low-Power Schottky (LS) TTL Operational Supply Voltage Range, 16-Pin Plastic Dual Inline Package (PDIP-16) Structural Framework, 20ns M aximum High-Speed Propagation Delay, Three Independent Gating Enable Pins (Dual Active-LOW, Single Active-HIGH), High Noise Rejection Input Threshold Circuit Matrix, Low Power Consumption 74LS Bipolar Technology, Fully Buffered Outputs, Foundational Hardware Boolean Address Decoding and Memory Bank Switching Junction | High-performance vintage digital logic integrated circuit manufactured by Fairchild Semiconductor (and later Texas Instruments) under the historical 9LS logic series engineering footprint. Housing a 1-of-8 decoder matrix array inside a 16-pin through-hole package envelope, this specialized device translates three binary select inputs directly into eight mutually exclusive active-LOW outputs. Its three-pin enable logic simplifies cascading layouts into wide-bus address validation arrays, memory chip-select loops, and multi-channel input/output routing networks without localized timing delays or data bus contention errors. Widely implemented inside legacy personal computer boards, early industrial programmable logic controllers (PLCs), retro arcade machine mainboards, and classic laboratory test instruments. | Industry Exact Equivalents: Fairchild 9LS138PC, Fairchild 9LS138, TI SN74LS138N, Motorola MC74LS138N, National Semiconductor DM74LS138N | Industry Functional Cross-References: 74LS138, 9LS138, HD74LS138P, NTE74LS138, 74HC138N (CMOS alternative) | Military Specification National Stock Number (NSN): 5962-01-022-5573 (Base 74LS138 Decoder Matrix Core) Show more